A great variety of metal-oxide-semiconductor (MOS) devices are known. It is desirable in such devices to provide a very short channel length in the gate region of the integrated circuit. One way to accomplish this is to use an n.sup.+ or p.sup.+ doped dual polarity polysilicon gate. In the process of forming such a gate, boron or boron compounds are implanted into the substrate, which generally results in the boron compounds penetrating too deep into the substrate. Additionally, the doping density of such compounds must be quite high, otherwise the gate will be depleted which results in a low channel current density.
Chattejee et al, have discussed this problem in connection with a sub-100 nm gate structure formed by replacing polysilicon above a gate region in Sub-100 nm Gate Length Metal Gate NMOS Transistors Fabricated by a Replacement Gate Process, International Electron Devices Meeting, Dec. 7-10, 1997, pp 821-824.
Known metal gate fabrication processes are complicated and pose difficult structural considerations during the fabrication of self-aligned components. For instance, copper makes an ideal metal gate, but it has poor adhesive characteristics as a thin film. Aluminum may also be used as a metal gate, but it is subject to electromigration problems.